The present invention relates to an improvement in an error correction circuit suitable for use in a digital audio disc (referred to hereinafter as "DAD") playback apparatus for an optical compact disc (referred to hereafter as "CD").
In recent years, it has become popular in the field of acoustic technology to have digital recording systems make use of a PCM (Pulse Coded Modulation) technique in order to obtain playback with as high fidelity as possible. This kind of technique, usually referred to as a "digital audio system," exhibits audio characteristics greatly superior to that of a conventional analog type playback system since it is not dependent on the characteristics of the recording medium.
In a "DAD" system which makes use of a disc as the recording medium, various types of recording/playback methods have been proposed, such as an optical type method, electrostatic type method, and mechanical type method. These recording/playback techniques require a playback apparatus which can satisfy various functions and a high standard of performance which could never be achieved by the prior art, regardless of the type of recording and playback techniques employed.
For example, in the case of the CD system, the disc used as the medium is made of a transparent resin and has a diameter of about 12 cm and a thickness of about 1.2 mm, the disc being coated with a metallic thin film in which are formed pits corresponding to the digital PCM signal. The disc is driven by a system called the CLV (Constant Linear Velocity) system at a variable rotational speed of about 500 to 200 r.p.m. An optical pick-up housing a semiconductor laser and a photoelectric conversion element are driven by a linear tracking system so that the laser beam scans radially the disc from the inner side to the outer side of the disc. The disc usually has a track pitch of 1.6 .mu.m and has a program area (radial range of 25 to 58 mm) which is large enough to store the information for a one-hour stereophonic playback on each side of the disc. In addition, index data and other associated data are stored in the lead-in area (radial range 23 to 25 mm).
In the DAD system of the type described, it is required to provide for an easy generation of pit synchronizing signals during playback and to realize a stable data slice by using narrow band frequency characteristics of the RF signal read by the optical pick-up. The recording of digitized data is conducted after such modulation that the interval of inversion of polarity always falls between the maximum and minimum polarity inversion interval. In case of DAD playback apparatus for an optical CD system, an EFM (Eight to Fourteen Modulation) is ordinarily used as the modulation system. Briefly, this modulation system divides the digitized data in a unit of 8-bit data and records the same after modulation to 14-bit data. In the playback, therefore, the 14-bit data is demodulated into original 8-bit digitized data. The 8-bit digitized data, produced by the demodulation of the 14-bit data reproduced from the disc, is led to an error correction circuit in which an error correcting operation is conducted.
In the optical CD type DAD playback apparatus, cross interleaved Reed-Solomon codes (referred to hereafter as "CIRC codes") are used as the error correcting codes. CIRC codes are obtained by submitting Reed-Solomon codes, which are a kind of Bose-Chaudhuri-Hocquenghem (BCH) code and are generally regarded as the most effective random error correction codes hitherto known, to a signal processing called "cross interleaving." CIRC codes thus obtained are sensitive enough to correct burst errors. Reed-Solomon codes can be decoded in the same way as other BCH codes, in order to correct errors.
A discussion will be made hereinafter as to the method of decoding typical Reed-Solomon codes consisting of k pieces of information data systems and (n-k) pieces of inspection symbols, i.e., consisting of n total pieces of symbols. It is noted here that these symbols are the elements of a Galois field GF (2.sup.m) which is a definite field having m pieces of binary bits, i.e., 2.sup.m elements. In this case, the generator polynomial H(x) having Reed-Solomon code for covering an error at number of times is given either by the following Equation (1) for BCH codes or (2) for Reed-Solomon codes, where .alpha. is a primitive element of Galois field GF(2.sup.m): EQU H(x)=(x+.alpha.)(x+.alpha..sup.2) . . . (x+.alpha..sup.2t) (1) EQU H(x)=(x+.alpha..sup.0)(x+.alpha.) . . . (x+.alpha..sup.2t-1), (2)
If we let U(x), V(x) and E(x) denote the recording signal polynomial, the playback signal polynomial and the error polynomial, respectively, then these polynomials satisfy the following relationship. EQU V(x)=U(x)+E(x) (3)
The coefficients of polynomials are contained by the Galois field GF(2.sup.m). If we let X.sub.j denote an error location, and let Y.sub.j denote the value of the error at the error location X.sub.j, the error polynomial E(x) can then be given as: ##EQU1## where .SIGMA. is the sum of the errors at all of the error locations.
Here, syndrome S.sub.i is defined here by: EQU S.sub.i =V(.alpha..sup.i) (5)
where, i=0,1, . . . , 2t-1.
Then, from equation (3) we have: EQU S.sub.i =U(.alpha..sup.i)+E(.alpha..sup.i)
Here U(x) can be divided by H(x) without leaving a remainder. As a result, the following therefore holds true: EQU S.sub.i =E(.alpha..sup.i)
From Equation (4) it is evident that syndrome S.sub.i may be expressed as follows: EQU Si=E(.alpha..sup.i)=.SIGMA..sub.j Y.sub.j (.alpha..sup.j).sup.i ( 6)
Let X.sub.j =.alpha..sup.j, X.sub.j represents the error location at .alpha..sup.j. Then EQU S.sub.i =.SIGMA..sub.j Y.sub.j X.sub.j.sup.i
The error location polynomial .sigma.(x) is defined as follows: EQU .sigma.(x)=.pi.(x-X.sub.j)=x.sup.e +.sigma..sub.1 x.sup.e-1 + . . . +.sigma..sub.e ( 7)
where e is the number of errors. The coefficients .sigma..sub.1 to .sigma..sub.3 of .sigma.(x) are related to the error syndrome S.sub.i as shown below: EQU S.sub.i+e +.sigma..sub.i.sub.S.sub.i+e-1 + . . . +.sigma..sub.e-1 /.sub.1 S.sub.i+1 +.sigma..sub.e /S.sub.i =0 (8)
Briefly, the above-explained process of decoding of the Reed-Solomon code is as follows.
(I) To calculate syndrome S.sub.i in accordance with Equation (5).
(II) To obtain coefficients .sigma..sub.1 to .sigma..sub.3 contained in the error location polynomial .sigma.(x) in accordance with Equation (8).
(III) To determine the root X.sub.j of the error location polynomial .sigma.(x) in accordance with Equation (7).
(IV) To determine the error polynomial E(x) in accordance with Equation (4), after determining the value Y.sub.j in accordance with Equation (6).
(V) To effect an error correction in accordance with Equation (3).
By using the steps listed above, the steps needed to decode a Reed-Solomon code consisting of many block data each containing four inspection symbols will be described as a practical example of the error correction. This code is represented by the following generator polynomial H(x): EQU H(x)=(x+1)(x+.alpha.)(x+.alpha..sup.2)(x+.alpha..sup.3).
In this case, this polynomial H(x) permits the correction of error up to double error, as explained hereinafter. The Reed-Solomon code may be decoded by the following process.
(I) To calculate syndromes S.sub.0 to S.sub.3.
(II) Equation (8) is rewritten for each of the cases of e=1 and e=2 as follows.
In case of e=1: EQU S.sub.1 +.sigma..sub.1 S.sub.0 =0 EQU S.sub.2 +.sigma..sub.1 S.sub.1 =0 EQU S.sub.3 +.sigma..sub.1 S.sub.2 =0 (9)
In case of e=2: EQU S.sub.2 +.sigma..sub.1 S.sub.1 +.sigma..sub.2 S.sub.0 =0 EQU S.sub.3 +.sigma..sub.1 S.sub.2 +.sigma..sub.2 S.sub.1 =0 (10)
It is assumed here that the actual decoder commences its operation from the state of e=1. In this case, it is necessary to determine the solution .sigma..sub.1 which satisfies the simultaneous Equation (9). If no solution .sigma..sub.1 is found, the decoder must find solutions .sigma..sub.1 and .sigma..sub.2 which satisfy the simultaneous Equation (10). In such solutions cannot be found, it is deemed that the condition of e=3 is met.
The solution .sigma..sub.1 of simultaneous Equation (9) can be expressed by: EQU .sigma..sub.1 =S.sub.1 /S.sub.0 =S.sub.2 /S.sub.1 =S.sub.3 /S.sub.2
The solution .sigma..sub.1 and .sigma..sub.2 of simultaneous Equation (10) is: EQU .sigma..sub.1 =(S.sub.0 S.sub.3 +S.sub.1 S.sub.2)/(S.sub.1.sup.2 +S.sub.0 S.sub.2), and EQU .sigma..sub.2 =(S.sub.1 S.sub.3 +S.sub.2.sup.2)/(S.sub.1.sup.2 +S.sub.0 S.sub.2)
(III) If the coefficient .sigma..sub.1 in the error location polynomial is obtained, find the root of the error location polynomial in accordance with Equation (7).
In the case of e=1: EQU .sigma.(x)=x+.sigma..sub.1 +0
Therefore, Z.sub.1 =.sigma..sub.1.
In the case of e=2: EQU .sigma.(x)=x.sup.2 +.sigma..sub.1 x+.sigma..sub.2 =0 (11)
Substituting the elements of the Galois field GF(2.sup.m) in Equation (11) one after another will yield roots Z.sub.1 and Z.sub.2.
(IV) If the roots of the error location polynomial are found, determine the error value Y.sub.j in accordance with Equation (6).
In the case of e=1: EQU S.sub.0 =Y.sub.1
Therefore, Y.sub.1 =S.sub.0.
In the case of e=2: EQU S.sub.0 =Y.sub.1 +Y.sub.2 EQU S.sub.1 =Y.sub.1 Z.sub.1 +Y.sub.2 Z.sub.2
Therefore, EQU Y.sub.1 =(Z.sub.2 S.sub.0 +S.sub.1)/Z.sub.1 +Z.sub.2), and EQU Y.sub.2 =S.sub.0 +Y.sub.1
(V) The correction of the error is conducted in accordance with the correction values Y.sub.1 and Y.sub.2 thus obtained.
FIG. 1 is a block diagram of a conventional error correction circuit constituted by an actual decoding system of CIRC codes based on the theory heretofore described. Pick-up 11 is adapted to reproduce an RF signal from the disc. The RF signal is converted by a data slice circuit (not shown) into digitized data and is used for the extraction of the synchronizing signal for the self-locking purpose, and is given to a demodulating circuit 12. As explained before, demodulating circuit 12 carries out the EFM demodulation for converting the 14-bit data recorded in the disc into 8-bit data and delivers the demodulated symbols to the error correcting means 13.
Error correcting means 13 is a cross interleave double correction system constituted by a double correcting circuit 14, de-interleave circuit 15 and a double correction circuit 16. In operation, when the result of the error judgment in the double correction circuit 14 has proved that the error is correctable, the error correction is conducted in the manner explained before and the corrected value is delivered to a D/A converter (not shown) through de-interleave circuit 15 and double correction circuit 16. On the other hand, when the error correcting capacity is exceeded, the error correction is not performed but an error flag E.sub.f representing the error location is added to the demodulated symbols and is outputted to de-interleave circuit 15 for a de-interleave processing together with the error flag E.sub.f. Then the error correction is affected by double correction circuit 16.
In the conventional error correction circuit, the coefficients .sigma..sub.i of the error location polynomial are determined by the simultaneous Equations (9) and (10) and the number of errors is judged to determine whether the error is singular, double or triple. Then the error location polynomial is selected in accordance with the error number and the root (error location) is determined. The error correction is conducted after determination of the error pattern. As stated before, the coefficients .sigma..sub.i are given as follows when the conditions of the simultaneous Equations (9) and (10) are met, respectively.
In case of Equation (9): EQU .sigma..sub.1 =S.sub.1 /S.sub.0 =S.sub.2 /S.sub.1 =S.sub.3 /S.sub.2
In case of Equation (10): EQU .sigma..sub.1 =(S.sub.0 S.sub.3 +S.sub.1 S.sub.2)/(S.sub.1.sup.2 +S.sub.0 S.sub.2) EQU .sigma..sub.2 =(S.sub.1 S.sub.3 =S.sub.2.sup.2)/(S.sub.1.sup.2 +S.sub.0 S.sub.2)
In either case, it is necessary to effect a dividing operation. As well known, dividing circuits are rather complicated although multiplying circuits can have a comparatively simple construction.
This gives rise to the demand for a simple circuit which can perform the judgment as to whether the error is a singular error, double error or a triple error.